Hard Disks – What IS ATA and Ultra ATA?

In the second half of 1997 EIDE’s 16.6 MBps limit was doubled to 33 MBps by the new Ultra ATA (also referred to as ATA-33 or Ultra DMA mode 2 protocol). As well as increasing the data transfer rate, Ultra ATA also improved data integrity by using a data transfer error detection code called Cyclical Redundancy Check ( CRC). The original ATA interface is based on transistor-transistor logic (TTL) bus interface technology, which is in turn based on the old industry standard architecture ( ISA) bus protocol. This protocol uses an asynchronous data transfer method. Both data and command signals are sent along a signal pulse called a strobe, but the data and command signals are not interconnected. Only one type of signal (data or command) can be sent at a time, meaning a data request must be completed before a command or other type of signal can be sent along the same strobe. Starting with ATA-2 the more efficient synchronous method of data transfer is used. In synchronous mode, the drive controls the strobe and synchronises the data and command signals with the rising edge of each pulse. Synchronous data transfers interpret the rising edge of the strobe as a signal separator. Each pulse of the strobe can carry a data or command signal, allowing data and commands to be interspersed along the strobe. To get improved performance in this environment, it is logical to increase the strobe rate. A faster strobe means faster data transfer, but as the strobe rate increases, the system becomes increasingly sensitive to electro-magnetic interference (EMI, also known as signal interference or noise)...

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