The announcement of the successor to the Intel Core Duo processor in the summer of 2006 also marked the reunification of Intel’s desktop and mobile product lines. Low power consumption was a principal goal of the Intel Core microarchitecture, and the moblie CPU, previously codenamed Merom, was listed as having a TDPs of 35 watts for the standard version and an impressive 5 watts TDP for Ultra Low Voltage (ULV) versions. Moreover, Intel claimed the chip was capable of 20% more performance at the same power level compared with the Core Duo.

The table below, which compares the mobile Core 2 Duo processor and its closest relation, the Core Duo predecessor, identifies several of the relatively minor improvements in the Core microarchitecture, which combine to achieve a significant hike in overall system performance:

Core 2 Duo (Merom) Core Duo (Yonah)
Manufacturing Process 65nm 65nm
Die Size 143mm2 90mm2
Transistors 291 million 151 million
Clock Speeds 1.06GHz – 2.4GHz+ 1.20GHz – 2.33GHz
FSB Frequency 533MHz – 800MHz 533MHz – 667MHz
L1 Cache Size 32KB + 32KB 32KB + 32KB
L2 Cache Size 2MB – 4MB Shared 2MB Shared
Pipeline Stages 14 12
Decoders 1 complex + 3 simple 1 complex + 2 simple
Maximum Decode Rate 4+1 3
Reorder Buffer 96 80
SSE Units 3 1
Socket Interface Socket-M (PGA/BGA) 

Socket-P (PGA/BGA)

Socket-M (PGA/BGA)

The mobile Core 2 Duo processors, in particular, include a number of advanced innovations, including:

  • Intel Dynamic Power Coordination: Coordinates Enhanced Intel SpeedStep Technology and idle power-management state (C-states) transitions independently per core to help save power.
  • Intel Dynamic Bus Parking: Enables platform power savings and improved battery life by allowing the chipset to power down with the processor in low-frequency mode.
  • Enhanced Intel Deeper Sleep with Dynamic Cache Sizing: Saves power by flushing cache data to system memory during periods of inactivity to lower CPU voltage.

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