NetBurst – Pentium 4 7th generation x86 CPU microarchitecture

NetBurst is the name Intel gave to the new architecture that succeeded its P6 microarchitecture. The concept behind NetBurst was to improve the throughput, improve the efficiency of the out-of-order execution engine, and to create a processor that can reach much higher frequencies with higher performance relative to the P5 and P6 microarchitectures, while maintaining backward compatibility. Initially launched in Intel’s seventh-generation Pentium 4 processors (the Willamette core) in late 2000, the NetBurst architecture represented the biggest change to the IA-32 architecture since the Pentium Pro in 1995. One of the most important changes was to the processor’s internal pipeline, referred to as Hyper Pipeline. This comprised 20 pipeline stages versus the ten for the P6 microarchitecture and was instrumental in allowing the processor to process more instructions per clock and to operate at significantly higher clock speeds than its predecessor. The NetBurst microarchitecture has only one decoder (as opposed to the three in the P6 microarchitecture), and the out of order execution unit now has the execution trace cache that stores decoded ops. The core’s ability to execute instructions out of order remains a key factor in enabling parallelism, several buffers being employed to smooth the flow of ops, and longer pipelines and the improved out-of-order execution engine allow the processor to achieve higher frequencies, and improve throughput. Ultimately, the NetBurst microarchitecture was to prove to be something of a disappointment in comparison to Intel’s mobile-processor technology. It was therefore not entirely surprising when it transpired that NetBurst’s successor would build on the energy-efficient philosophy adopted in Intel’s mobile microarchitecture and embodied in its Pentium M family of...

Pin It on Pinterest