IA-32 – sometimes generically called x86-32 – is the instruction set architecture of Intel\’s family of 32-bit microprocessors; previous microprocessor architecture had been 16-bit. It was introduced in the Intel\’s third generation 80386SX and DX processors in 1985. In fact, the 386SX was only a 32-bit processor on the inside, since it interfaced to the outside world through a 16-bit data bus. This meant that data moved between an SX processor and the rest of the system at half the speed of a 386DX.
Fourth generation processors were also 32-bit. However, they all offered a number of enhancements. First, the entire design was overhauled for Intel\’s 486 range, making them inherently more than twice as fast. Secondly, they all had 8K of cache memory on the chip itself, right beside the processor logic. This cached data transfers from main memory meaning that on average the processor needed to wait for data from the motherboard for only 4% of the time because it was usually able to get the information it required from the cache.
The 486DX model differed from the 486SX only in that it brought the maths co-processor on board as well. This was a separate processor designed to take over floating-point calculations. It had little impact on everyday applications but transformed the performance of spreadsheets, statistical analysis, CAD and so forth.
An important innovation was the vclock doubling introduced on the 486DX2. This meant that the circuits inside the chip ran at twice the speed of the external electronics. Data was transferred between the processor, the internal cache and the math co-processor at twice the speed, considerably enhancing performance. The 486DX4 took this technique further, tripling the clock speed to run internally at 75 or 100MHz and also doubled the amount of Level 1 cache to 16K.
- Principles of CPU architecture – logic gates, MOSFETS and voltage
- Basic structure of a Pentium microprocessor
- Microprocessor Evolution
- IA-32 (Intel Architecture 32 ) – base instruction set for 32 bit processors
- Pentium P5 microarchitecture – superscalar and 64 bit data
- Pentium Pro (P6) 6th generation x86 microarchitecture
- Dual Independent Bus (DIB) – frontside and backside data bus CPU architecture
- NetBurst – Pentium 4 7th generation x86 CPU microarchitecture
- Intel Core – 8th generation CPU architecture
- Moore’s Law in IT Architecture
- Architecture Manufacturing Process
- Copper Interconnect Architecture
- TeraHertz Technology
- Software Compatibility
- IA-64 Architecture
- Illustrated guide to high-k dielectrics and metal gate electrodes