In the late 1990s, PC users have benefited from an extremely stable period in the evolution of memory architecture. Since the poorly organised transition from FPM to EDO there has been a gradual and orderly transition to Synchronous DRAM technology. However, the future looks considerably less certain, with several possible parallel scenarios for the next generation of memory devices.

By the end of 1998, 100MHz SDRAM (PC100) was the industry standard for mainstream PC and servers. As shown in the comparison table below, this offers a maximum memory bandwidth of 800 MBps, which at a typical efficiency of 65% delivers around 500 MBps in practice. This is perfectly adequate for a standard desktop PC, but at the high end of the market faster CPUs, high-powered AGP graphics subsystems and new applications require greater levels of performance.

The intended alternative to SDRAM was Direct Rambus, the highly scaleable and pipelined memory architecture invented by Californian company Rambus and supported by industry giant Intel. This was due to have come to fruition by mid-1999 with the launch of the Pentium III CPU’s 133MHz companion chipset, codenamed Camino. However, problems with this chipset and with the manufacture of Direct Rambus DRAM (DRDRAM) chips have delayed the launch until late 1999. Another contributing factor to the uncertainty has been the reluctance of DRAM manufacturers to pay the steep royalty costs for using Rambus technology. Cost to end users is also a problem, early estimates suggesting up to a 50% price premium for DRDRAM modules (RIMMs) over SDRAM.

The consequence is that PC manufacturers have been left looking for a route to an interim higher-bandwidth, lower latency memory, particularly for use in servers and workstations. The first alternative was PC133 SDRAM – a straightforward incremental speed upgrade to PC100 memory. This has the advantage that modules can be used in existing 100MHz systems. In the autumn of 1999 Intel finally agreed to adopt the PC133 standard and announced the intention to produce a PC133 chipset in the first half of 2000. In the meantime vendors will have to continue to source these from rival chipset manufacturers.

The second possibility is Double Data Rate SDRAM (DDR-SDRAM), which has the advantage of running at the same bus speed (100MHz or 133MHz) as SDRAM, but by using more advanced synchronisation is able to double the available bandwidth to 2.1GBps. A development of this approach is DDR2-SDRAM, offering up to 4.8 GBps, which is backed by a new consortium of DRAM manufacturers known as Advanced Memory International. This group is effectively a rechartered incarnation of the SyncLink DRAM (SLDRAM) Consortium, which in 1998 promoted a scaleable packet-based technology very similar to Direct Rambus, but as a royalty-free standard.

In the long term, it is highly likely that Direct Rambus will become the standard – not least because its scaleability in unmatched by the alternatives apart from SLDRAM. However, until that happens it appears likely that different manufacturers will go different their ways – raising the unfortunate prospect in the short term of a number of competing and incompatible memory types and speeds.

PC100 PC133 DDR 

SDRAM

SLDRAM Base 

Rambus

Concurrent 

Rambus

Direct 

Rambus

Announced 

Frequency

(MHz)

100 133 200/266 800 700 700 600/800
Maximum 

Bandwidth

(GBps)

0.80 1.00 1.6/2.1 1.60 0.70 0.70 1.2/1.6
Expected 

Bandwidth

(GBps)

0.50 0.60 0.9/1.2 unknown 0.40 0.50 1.1/1.5
Efficiency (%) 65 60 60 unknown 60 80 97
Data Width 

(bits)

64 64 64 16 8/9 8/9 16/18

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