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i850 Chipsets

Designed in tandem with the Pentium 4 processor, Intel’s 850 Chipset represents the next step in the evolution of the Intel Hub Architecture, the successor to the previous northbridge southbridge technology first seen on the 810 Chipset. Comprising the 82850 Memory Controller Hub (MCH) and 82801BA I/O Controller Hub (ICH2), the new chipset’s principal features are:

  • a 400MHz system bus
  • dual RDRAM memory channels, operating in lock step to deliver 3.2 GBps of memory bandwidth to the processor
  • support for 1.5V AGP4x technology, allowing graphics controllers to access main memory at over 1 GBps – twice the speed of previous AGP platforms
  • two USB controllers, doubling the bandwidth available for USB peripherals to 24 MBps over four ports
  • dual Ultra ATA/100 controllers support the fastest IDE interface for transfers to storage devices.

To ensure maximum performance, the system bus is balanced with the dual RDRAM channels at 3.2 GBps, providing 3x the bandwidth of platforms based on Intel III processors and allowing better concurrency for media-rich applications and multitasking.

In the autumn of 2002, some 18 months after the i850 was first introduced, the i850E variant was released, extending the capabilities of the chipset to support Hyper-Threading, a 533MHz system bus and PC1066 memory, for Pentium 4 class processors.

  • Intel’s Triton Chipsets Explained – their history, architecture and development
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