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AMD K6

For many years Advanced Micro Devices (AMD), like Cyrix, had made 286, 386 and 486 CPUs that were directly derived from Intel’s designs. The K5 was the company’s first independently created x86 processor, and one for which AMD had held high hopes. In the event, however, it met with only limited success, more as a result of missing its window of opportunity than any particular problems with the processor itself.

However, its purchase of a California-based competitor in the spring of 1996 appears to have enabled AMD to prepare better for its next assault on Intel. The K6 began life as the Nx686, being renamed after the acquisition of NextGen. NexGen had been intending to market this chip in its own socket, but AMD changed the design to fit the standard Socket 7. The K6 range of MMX-compatible processors was launched in mid-1997, some weeks ahead of the Cyrix 6x86MX, and met with immediate critical acclaim.

Manufactured on a 0.35-micron five-layer-metal process, the K6 was almost 20% smaller than a Pentium Pro yet contained 3.3 million more transistors (8.8 million to 5.5 million). Most of these additional transistors resided in the chip’s 64KB Level 1 cache, consisting of 32KB of instruction cache and 32KB of writeback dual-ported cache. This was four times as much as the Pentium Pro and twice as much as the Pentium MMX and Pentium II.

AMD-K6

The K6 supported Intel’s MMX Technology, including 57 new x86 instructions designed to enhance and accelerate multimedia software. Like the Pentium Pro, the K6 owed a great deal to classic Reduced Instruction Set Computer (RISC) designs. Using AMD’s RISC86 superscalar microarchitecture, the chip decoded each x86 instruction into a series of simpler operations that could then be processed using typical RISC principles – such as out-of-order execution, register renaming, branch prediction, data forwarding and speculative execution.

The K6 was launched in 166MHz, 200MHz and 233MHz versions. Its level of performance was very similar to a similarly clocked Pentium Pro with its maximum 512KB Level 2 cache. In common with Cyrix’s MX chip – but to a somewhat lesser extent – floating-point performance was an area of relative weakness compared with Intel’s Pentium Pro and Pentium II processors. However, the processor’s penetration of the marketplace in late 1997/early 1998 was hampered by problems AMD had in migrating its new 0.25-micron manufacturing process from its development labs to its manufacturing plant. As well as causing a shortage of 200MHz and 233MHz parts, this also delayed the introduction of 266MHz chip and the cancellation of the 300MHz chip.

  • AMD K6
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  • AMD K6-3
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  • AMD 750 Chipset
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  • AMD Palomino
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  • AMD HyperTransport
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  • AMD Athlon 64
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  • AMD Athlon 64 X2
  • AMD Socket AM2
  • Barcelona, AMD’s native Quad Core CPU

Filed Under: AMD technology Tagged With: AMD K6

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