Pentium MMX Technology

Intel’s P55C MMX processor with MultiMedia eXtensions was launched at the beginning of 1997. It represented the most significant change to the basic architecture of the PC processor for ten years and provided three main enhancements:

  • the on-board Level 1 cache of a standard Pentium was doubled to 32KB
  • fifty-seven new instructions were added which were specifically designed to manipulate and process video, audio and graphical data more efficiently
  • a new process called Single Instruction Multiple Data (SIMD) was developed which enabled one instruction to perform the same function on multiple pieces of data simultaneously.


The larger primary cache means that the processor will have more information to hand, reducing the need to retrieve data from the Level 2 cache, and is of benefit to all software. The new instructions, used in conjunction with SIMD and the P55C’s eight enhanced (64-bit) registers, make heavy use of parallelism, where eight bytes of data can be processed in a single cycle, instead of one per cycle. This has a special advantage for multimedia and graphics applications such as audio and video encoding/decoding, image scaling and interpolation. Instead of moving eight pixels of graphics data into the processor one at a time, to be processed separately, the eight pixels can be moved as one 64-bit packed value, and processed at once by a single instruction. Intel claimed these enhancements gave a 10-20% speed increase using non-MMX software and as much as a 60% increase on MMX-enabled applications.

The table below shows the various incarnations of the Pentium MMX processor from its launch in 1997 up until the introduction of the Pentium II:

Date Codename Transistors Fabrication (µm) Speed (MHz)
1997 P55 4,500,000 0.28 166/200/233
1998 P55 4,500,000 0.25 266