CMOS Digital Cameras

1998 saw CMOS sensors emerge as an alternative image capture technology to CCDs. The CMOS manufacturing processes are the same as those used to produce millions of processors and memory chips worldwide. As these are established high-yield techniques with an existing infrastructure already in place, CMOS chips are significantly less expensive to fabricate than specialist CCDs. Another advantage is that they have significantly lower power requirements than CCDs. Furthermore, whilst CCDs have the single function of registering where light falls on each of the hundreds of thousands of sampling points, CMOS can be loaded with a host of other tasks – such as analogue-to-digital conversion, load signal processing, handling white balance and camera controls, and more. It’s also possible to increase CMOS density and bit depth without bumping up the cost.

For these and other reasons, many industry analysts believe that eventually, almost all entry-level digital cameras will be CMOS-based and that only midrange and high-end units will use CCDs. Problems remain to be solved – such as noisy images and an inability to capture motion correctly – and at the start of the new millennium CMOS technology clearly had a way to go before reaching parity with CCD technology.

However, its prospects were given a major boost in late 2000 when Silicon Valley-based Foveon Inc. announced its revolutionary X3 technology and the manufacture of a CMOS image sensor with about 3 times the resolution of any previously announced photographic CMOS image sensor and more than 50 times the resolution of the most commonly manufactured CMOS image sensors low-end consumer digital cameras of the time.

Hitherto, CMOS image sensors had been manufactured using 0.35 or 0.50 micron process technology, and it had been generally accepted that 0.25 represented the next round of product offerings. Foveon’s 16.8 million pixel (4096×4096) sensor is the first image sensor of any size to be manufactured with 0.18 micron process technology – a proprietary analogue CMOS fabrication process developed in collaboration with National Semiconductor Corporation – and represents a two generation leap ahead of the CMOS imager industry. The use of 0.18 micron processing enables more pixels to be packed into a given physical area, resulting in a higher resolution sensor. Transistors made with the 0.18 micron process are smaller and therefore do not take up as much of the sensor space, which can be used instead for light detection. This space efficiency enables sensor designs that have smarter pixels which can provide new capabilities during the exposure without sacrificing light sensitivity.

Comprising nearly 70 million transistors, the 4096×4096 sensor measures 22mm x 22mm and has an estimated ISO speed of 100 with a <dynamic range of 10 stops. In the 18 months following its release the sensor is expected to be seen in products for the high-quality professional markets – including professional cameras, film scanners, medical imaging, document scanning and museum archiving. In the longer term, it is anticipated that the sensor’s underlying technology will migrate down to the larger, consumer markets.