AMD’s HyperTransport – originally named Lightning Data Transport (LDT) – is an internal chip-to-chip interconnect that provides much greater bandwidth for I/O, co-processing and multi-processing functions. HyperTransport supports unidirectional point-to-point links in each direction and is capable of achieving a bandwidth of up to 6.4 GBps per connection. Throughput is, in fact, variable and negotiated at initialisation. HyperTransport provides a more than a 20x increase in bandwidth compared with current system interconnects that are capable of running at up to 266 MBps.
The sort of topology that HyperTransport facilitates is illustrated in the diagram. It allows multiple Northbridge chips – each with multiple Athlon CPUs connected via the standard EV6 bus – to communicate with each other over a common, high-performance bus. The Northbridge chips can then be connected with a Southbridge or other interface controllers using the same HyperTransport bus.
HyperTransport can be seen as complementing externally visible bus standards such as PCI or Serial I/O, providing a very fast connection to both. Its increased I/O performance and bandwidth will improve overall system performance for Athlon-based servers, workstations and personal computers.
The first product to use HyperTransport technology was a HyperTransport-to-PCI bridge chip, announced in the spring of 2001.